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Single-chip 100-Mbit/sac fiber-optic receiver/phase lock loop circuit

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Abstract

In computer communication applications of fiber optics the key requirements are data rate, packaging density, and low cost; transmission distance is of relatively low importance.1 Integration of the link electronic functions onto easily manufactured IC chips Is an important step toward these goals. We report here on what we believe is the first Implementation, at 100 Mbit/sec, of an optical receiver and phase lock loop (PLL) clock recovery circuit on a single chip. The only external components are a photodiode and decoupling capacitors.

© 1985 Optical Society of America

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