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System-Level Demonstration of a Dynamically Reconfigured Burst-Mode Link Using a Nanosecond Si-Photonic Switch

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Abstract

Using a novel FPGA-based network emulator, microsecond-scale packets with 12.5-20-Gb/s data are generated, routed through a nanosecond Si-photonic switch, and received in a fast-locking burst-mode receiver. Error-free links with <382-ns system-level switching are shown.

© 2018 The Author(s)

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