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FPGA-Based Real-Time Soft-Decision LDPC Performance Verification for 50G-PON

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Abstract

We have studied the combined use of the mother LDPC code from ongoing industrial standards and soft-decision to further improve the performance of the FEC. Through experimental measurements based on a real-time FPGA platform, we found that this approach offers ~1.3 dB more gross coding gain.

© 2019 The Author(s)

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